Sony PlayStation 2 Chip Set Overview

First of Its Kind

The 128-bit CPU is the first of its kind in the world, integrated with the state-of-the-art 0.15 micron process technology on a single LSI.

The new CPU incorporates two 64-bit integer units (IU) with a 128-bit SIMD multimedia command unit, three independent floating point vector calculation units (FPU, VU0, VU1), an MPEG 2 decoder circuit (Image Processing Unit/IPU), and high-performance DMA controllers onto one silicon chip.

Four Times the Memory

The main memory supporting the high-speed CPU uses the Direct Rambus® DRAM in two channels to achieve a 3.2 GB/second bus bandwidth--or four times the performance of the latest PCs that are built on the PC-100 architecture.

Super Computer

With a floating point calculation performance of 6.2 GFLOPS/second, the overall calculation performance of this new CPU matches that of a super computer. When applied to the processing of geometric and perspective transformations normally used in the calculation of 3D computer graphics (3DCG), the peak calculation performance reaches 66 million polygons per second.

GRAPHICS SYNTHESIZER™

Pioneering Technology

The Graphics Synthesizer incorporates a massively parallel rendering engine that contains a 2,560-bit wide data bus--20 times the size of leading PC-based graphics accelerators. Very high pixel fill rates and drawing performance are achieved using embedded DRAM process technology pioneered by SCE for use in advanced graphics technology.

Unrivaled Graphics Performance

The original PlayStation introduced the concept of the Graphics Synthesizer via the real-time calculation and rendering of a 3D object. The new GS rendering processor is the ultimate incarnation of this concept--delivering unrivaled graphics performance and capability. The rendering function was enhanced to generate image data that supports NTSC/PAL television. The quality of the resulting screen image is comparable to movie 3D graphics in real time.

Superior Memory Access Bandwidth

In the design of graphics systems, the rendering capability defined by the memory bandwidth between the pixel engine and the video memory. Conventional systems use external VRAM reached via an off-chip bus that limits the total performance of the system. For the new GS, however, there is a 49-gigabyte memory access bandwidth achieved via the integration of the pixel logic and the video memory on a single high performance chip.

I/O PROCESSOR

Backwards Compatibility

Developed with LSI Logic Corporation, the I/O Processor supports Universal Serial Bus (USB), which is the standard for digital interconnectivity. The IOP also delivers backwards compatibility with the current PlayStation architecture.

Increased Performance

Based on the current PlayStation CPU, with enhanced cache memory and a new, higher-performance DMA architecture that permits a four-fold increase in data transfer rates, the serial interface is also upgraded to more than 20 times the performance of the current PlayStation. The USB host controller and the physical layers are also integrated onto this chip LSI.

USB Interface Compatibility

The USB interface is compatible with OHCI (Open Host Controller Interface) and can handle data transfer rates of between 1.5 Mbps and 12 Mbps (megabits per second).